Automatic Generation of Application Specific Processor Libraries from a High Level Description

Application Specific Instruction Processors (ASIPs) provide enhanced performance by directly implementing application segments in hardware as custom instructions. Recent work [1, 2] automates generation of custom instructions from application source code. Speedups of up to 6 times [3] are attainable for certain benchmarks. However, instructions generated from C are often restricted to small clusters of operations due to limited inference of parallelism. For fundamental operations, e.g. Fast Fourier transform, an alternative approach is to provide libraries of optimised, parallel custom instruction implementations. We automatically generate libraries comprising hardware custom instructions, software and their associated interfaces from a high-level description. Using a single, concise description in the Quartz [4] language, we generate parameterised libraries for performance critical operations. Parameters enable exploration of hardware/software partitioning and degree of pipelining, so that the library is customised to meet the required performance and area constraints. The Quartz language is inspired by concepts from functional and relational programming. Quartz supports polymorphism and overloading with type inference, higher-order functions (functions that can be parameterised by other functions) and relational composition operators to facilitate clear and efficient description of highly parameterised hardware libraries. Our Quartz compiler generates both hardware custom instructions (in VHDL) and software (C) from a single specification. We use Quartz higher-order functions to control the partitioning between software and hardware. Thus, we produce multiple library implementations automatically, each with a different performance and area trade-off. Moreover, our approach requires only the single, concise Quartz code to be verified correct, as opposed to many hardware/software designs. Our CUSTARD [3, 5] infrastructure automatically generates application specific processors from the Quartz hardware description. CUSTARD generates synthesisable RTL for parameterisable, embedded MIPS instruction set processors including custom instructions. We support various implementation options for CUSTARD: different pipeline depths, different coupling to custom instructions and optional hard-multiplier. For accurate cycle counts, frequency and